An Efficient Retargetable Simulator for ASIP Design Space Exploration
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Abstract
The design of modern embedded systems requires automated modeling tools for faster design and for the study of various design tradeoffs. Such tools put together constitute an integrated environment where the designer can write the high level design specifications in a language and use these tools for automatic generation of system specific tools. The major contribution of this paper lies in design and development of retargetable simulator and validation of the simulator. Proposed simulator measures cycle count for application executed on processor. Methodology for the Simulator is also discussed. The Operational aspect of retargetable simulator follows the simple and elegant steps and is easy to configure and understand. Optimized source code is generated by retargetable compiler. This optimized code is given as input to the Retargetable simulator. Along with the optimized code, the processor descriptions are required to enter and simulator is executed to get the desired result in the form of Cycle count.
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Keywords: ASIP, Application Specific Instruction Processors, Retargetable Simulator, Embedded Systems, Processors, ASIP Simulators, Design Space Exploration.
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