Improving the Performance of Single Core Processor using FPGA’s



Multicore Architecture is a Buzz Word in IT Industry. Multicore made revolutionary changes in the Field of Hardware. Though there is no much usage of newly introduced architectures as we are still using sequential programs for developing software’s. But the changes made people to go with new architectures though they are not able to use them completely. In this paper we are going to introduce a mechanism where the single core architecture CPU can be migrated by using FPGAs to cope up with the performance of Multicore Architecture CPU’s. The main advantage of this mechanism is that instead of buying Multicore architectures CPU one can use existing CPU with additional functionalities as per their needs. Intern it will make normal users to use existing hardware instead of going for advanced architectures. The main advantage of this mechanism is reducing the cost of hardware instead of buying whenever there is a new version in the market. As per Moore’s Law the Number of Transistors on chip will increase every 18 months. Which will make manufacturing companies to release new hardware might not be for 18 months at least for 24 months once. Because of which the users in Developing countries like India are facing problems in buying new hardware on Yearly Basis.


Single Core, Multi Core, FPGA

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S. M. Alnaeli, A. Alali, J. I. Maletic, "Empirically Examining the Parallelizability of Open Source Software System", Reverse Engineering (WCRE) 2012 19th Working Conference on, pp. 377-386, 2012.

C. Iancu, S. Hofmeyr, F. Blagojevic, Z. Yili, "Oversubscription on multicore processors", Parallel & Distributed Processing (IPDPS) 2010 IEEE International Symposium on, pp. 1-11, 2010.

Z. Yuanfang, C. Gill, L. Chenyang, "Real-Time Performance and Middleware for Multiprocessor and Multicore Linux Platforms", Embedded and Real-Time Computing Systems and Applications 2009. RTCSA '09. 15th IEEE International Conference on, pp. 437-446, 2009

L. Chai, A. Hartono, and D. K. Panda. Designing High PerformanceandScalableMPIIntra-nodeCommunicationSupport for Clusters. In The IEEE International Conference on Cluster Computing, 2006.

Max Domeika and Lerie Kane. Optimization Techniques for Intel Multi-Core Processors.

D.H.Baileyetal. TheNASparallelbenchmarks. volume 5, pages 63–73, Fall1991.

Matthew Curtis-Maury et al. An Evaluation of OpenMP on Current and Emerging Multithreaded/Multicore Processors. In IWOMP,2005.

Sadaf R. Alam et al. Characterization of Scientific Workloads on Systems with Multi-Core Processors. In International Symposium on Workload Characterization, 2006.

P. Kongetira, K. Aingaran, K. Olukotun, "Niagara: A 32-way multithreaded Sparc processor", Proc. IEEE Micro, vol. 25, no. 2, pp. 21-29, Mar. 2005



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